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This page provides an overview of the control system for the complex of accelerators operated by the
Collider-Accelerator Department.
This overview is organized according to the technologies used:
- Computer Network
- Software Technologies
- Hardware Technologies
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Computer Network
The control system for the complex of accelerators operated by the Collider-Accelerator Department is constructed around an extensive network of computers.
- The network which interconnects these computers is based on Ethernet protocols.
- The Operations subnet is dedicated to direct operational support of the accelerators, and provides 1024 node addresses.
- The Development subnet is dedicated to support of development activities by programmers, physicists and engineers, and provides 1024 node addresses.
- The Operations and Development subnets are isolated from the BNL campus backbone network by a firewall; likewise, the BNL campus network is
isolated from the global internet by a perimeter firewall.
- The Operations and Development subnets employ optical fiber links between buildings, and offer 10 Mbps and 100 Mpbs links.
- Consoles for accelerator operators, physicists, engineers and software developers are implemented on Sun Solaris workstations, Linux PCs, X-terminals and
Windows PCs with X-windows support.
- Accelerator hardware interfaces are supported in VMEbus crate-based computer systems (Front End Computers or FECs) which run
a commercial Real Time Operating System (RTOS), with custom application software.
- Back end computer workstations provide extensive support for disk storage, database systems, data logging activities and compute-intensive applications
such as accelerator modeling programs.
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Software Technologies
- Real Time Systems
Front End Computers (FECs) implement real time interfaces to accelerator hardware systems.
- FECs employ Single Board Computers in a VMEbus format, and run the commercial RTOS VxWorks.
- Custom FEC application software is largely writen in C++.
- FEC software for RHIC is based upon the ADO (Accelerator Device Object) model.
- FEC software for the AGS and the injector complex is based upon the (older) Station - Controller - Logical Device model.
- FECs function as control and data servers for Application Program clients, using a Sun RPC (Remote Procedure Call) interface.
- Application Programs
The majority of application programs are written in C++; some tcl and Java programs are in use as well.
- Extensive libraries of C++ classes are provided to support:
- X-windows GUI (Graphic User Interface) tools
- FEC communication (Sun RPCs)
- Database access
- The Cdev toolkit is used to provide a uniform interface for applications which access both ADOs and Logical Devices.
- Clearcase is used for source code management.
- All application programs are compiled to run on Sun Solaris platforms; many run native on Linux platforms as well.
- Database
Sybase databases are used to manage large volumes of data:
- Configuration descriptions for FEC hardware, ADOs, Stations, Controllers and Logical Devices; also configuration setups for appliction programs.
- Summaries of RHIC fills, for each RHIC run.
- Indexes to: logged data files, for routine data logs and for RHIC post-mortem data; also indexes to archives of control system states, i.e. device setpoints.
Several custom applications provide access to these databases with the convenience of a GUI.
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Hardware Technologies
- VMEbus Systems
FEC VMEbus systems are physically distributed over a large accelerator complex - for scale, the RHIC ring is
2.4 miles (3.8 km) in circumference.
- RHIC is supported by some 185 VMEbus FECs.
- The AGS and the remainder of the injector complex are supported by some 50 VMEbus FECs.
- VMEbus crates are populated by COTS (Commercial Off The Shelf) and custom Vme modules.
- Some four dozen designs for custom Vme modules have been locally developed to address a variety of applications, such as:
- Instrumentation
- Power supply control
- Timing
- Safety
Technologies employed in these Vme module designs include:
- Altera FPLAs
- i960 deeply embedded microprocessors
- Pulse-To-Pulse Modulation
The pulsed accelerators of the injector complex (AGS, Booster, Linac) employ a technique called Pulse-To-Pulse
Modulation (PPM) to rapidly switch among a variety of pre-programmed operating cycles, in order to
provide a diversity of operating modes for a broad community of users. Hardware and software technologies
cooperate to implement PPM.
- Linac Users: Booster, BLIP, Accelerator Studies;
- Booster injection from: Linac (protons, polarized protons), Tandem (heavy ions);
- Booster Users: AGS, NSRL, Accelerator Studies;
- AGS Users: RHIC, SEB, Accelerator Studies.
- Timing Systems
Digital timing links are used to synchronize operation of the accelerators;
these timing links are implemented as serial self-clocking signals on a 10MHz carrier
using a modified Manchester code, and are distributed throughout the accelerator complex
on optical fiber. Many of the custom Vme modules source or receive these timing links.
These timing links also support and integrate PPM.
- Legacy Systems
Portions of the control system are as much as 30 years old; support of antiquated
legacy systems is a continuing challenge, such as:
- Multibus interfaces to accelerator hardware
- Custom Datacon fieldbuses, and custom Datacon interfaces to accelerator hardware
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